Side-Channel Attack Resistant Advanced Encryption Standard (AES) IPs
To mitigate Side-Channel Attacks (SCAs) on ASICs and FPGAs, we offer SCA-Resistant AES design IP with dual-hiding and asynchronous-logic countermeasures for highly secure data encryption. We also offer AES designs with additional masking countermeasures that provide added SCA protection for data encryption.
Dual-Hiding (+ Masking) countermeasure
Inner asynchronous-logic operation
Global synchronous-logic interfacing
Inherently resistant to fault attack + reverse engineering
FPGA/ASIC implementation (soft IP and/or hard IP available)
Test data available