Asynchronous-logic Design Tool
To provide the design solution for asynchronous-logic in netlist level, we offer Asynchronous- logic Design Tool with high compatibility of standard design flow.
KEY FEATURES
Single-rail to dual-rail conversion
Dual-rail logic implementation
Self-timed handshake operation
Applicable to FPGA/ASIC
Optimization for power/area/speed
Coming soon. Contact Us to know more.